Who Should Attend?
B.E / B.Tech (ECE,AEI,EIE,EEE) (3rd semester onwards).
Prerequisites.
Basic electronics knowledge
Workshop Contents
Introduction to VHDL
Basic Terminologies in VHDL
- Library
- Entity
- Architecture
Operators in VHDL
- Logical Operators
- Relational Operators
- Shift Operators
- Addition Operators
- Multiplication Operators
VHDL Statements
- Sequential Statements
- Concurrent Statements
Behavioral and Data Flow model
VHDL Simulation
- Basic gates/universal gates
- Combinational Circuits (Half adder/Half subtractor)
- Multiplexer/De-multiplexer
- Decimal to Binary encoder
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Tianjin 300392, China
Tel : +86 22 83726901
Fax: +86 22 83726903
E-mail:
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